The present invention pertains to the field of computer graphics design. More specifically, the present invention pertains to an integrated circuit used to perform geometry and lighting calculations that are used in computer graphics design.
Computer graphics design generally consists of instructions implemented via a graphics program on a computer system. The instructions are used to specify the calculations and operations needed to produce three-dimensional displays. OpenGL by Silicon Graphics, Inc., of Mountain View, Calif., exemplifies a system of graphics instructions used by graphics designers and artists.
Computer graphics design can be envisioned as a pipeline through which data pass, where the data are used to define the image to be produced and displayed. At various points along the pipeline, various calculations and operations are specified by the graphics designer, and the data are modified accordingly.
In the initial stages of the pipeline, the desired image is framed using geometric shapes such as lines and polygons, referred to in the art as xe2x80x9cprimitives.xe2x80x9d The derivation of the vertices for an image and the manipulation of the vertices to provide animation entail performing numerous geometric calculations in order to project the three-dimensional world being designed to a position in the two-dimensional world of the display screen.
Primitives are then assembled into xe2x80x9cfragments,xe2x80x9d and these fragments are assigned attributes such as color, perspective, and texture. In order to enhance the quality of the image, effects such as lighting, fog, and shading are added, and anti-aliasing and blending functions are used to give the image a smoother and more realistic appearance. The processes pertaining to assigning colors, depth, texturing, lighting, etc., are collectively known as rasterization.
In the final stage, the fragments and their associated attributes are stored in the framebuffer. The pixel values are read from the framebuffer and used to draw images on the computer screen.
With reference now to Prior Art FIG. 1, process 130 exemplifies a graphics design process implemented using a graphics program on a computer system. Process 130, also referred to in the art as a state machine or a rendering pipeline, enables the designer to produce three-dimensional images using different computer systems and processors.
Process 130 operates on vertex (or geometric) data 131. The process stages within process 130 consist of display list 133, evaluators 134, per-vertex operations and primitive assembly 135, rasterization 138, per-fragment operations 139, and framebuffer 140.
Vertex data 131 are loaded from the computer system""s memory and saved in display list 133. When display list 133 is executed, evaluators 134 derive the coordinates, or vertices, that are used to describe points, lines, polygons, and the like (e.g., primitives). All geometric primitives are eventually described by vertices.
With reference still to Prior Art FIG. 1, in per-vertex operations and primitive assembly 135, vertex data 131 are converted into primitives that are assembled to represent the surfaces to be graphically displayed. Some vertex data (for example, spatial coordinates) are transformed by four-by-four floating point matrices to project the spatial coordinates from a position in the three-dimensional world to a position on the display screen. In addition, advanced features are also performed in per-vertex operations and primitive assembly 135. Texturing coordinates may be generated and transformed. Lighting calculations are performed using the transformed vertex, the surface normal, material properties, and other lighting information to produce a color value. Perspective division, which is used to make distant objects appear smaller than closer objects in the display, also occurs in per-vertex operations and primitive assembly 135.
Rasterization 138 is the conversion of vertex data into xe2x80x9cfragments.xe2x80x9d Each fragment corresponds to a single element (e.g., a xe2x80x9cpixelxe2x80x9d) in the graphics display, and typically includes data defining color, shading, and texture. Thus, for a single fragment, there are typically multiple pieces of data defining that fragment.
Per-fragment operations 139 consist of additional operations that may be enabled to enhance the detail of the fragments, such as blending, dithering and other like operations. After completion of these operations, the processing of the fragment is complete and it is written as a pixel to framebuffer 140. Thus, there are typically multiple pieces of data defining each pixel.
Continuing with reference to Prior Art FIG. 1, a disadvantage to the prior art is that the graphics design process (e.g., process 130) is implemented using a strictly segmented computer system architecture. The architecture of the prior art utilizes graphics front end unit 150 that executes display list 133 and evaluators 134. The information is next sent to geometry engine 160, which is a separate processor for executing per-vertex operations and primitive assembly 135. The information is then sent to rasterization engine 170, which typically is a separate processor for executing rasterization 138 and per-fragment operations 139.
Thus, the computer system architecture of the prior art is problematic because it requires additional hardware such as additional processors for the various segments of the graphics design process, and it is therefore more expensive. In addition, the prior art is problematic because control of the graphics design process is made more complex by segmenting the process. Hence, in the prior art, additional space is required to store and execute the microcode used to control the overall process and the segments of the process, requiring that the processors be larger in size and thereby also increasing the expense.
The prior art is also problematic because the computer systems utilize general purpose processors to execute the operations and calculations required by the graphics program. Accordingly, the calculations are specified using general operations so that they can be executed by general purpose processors. For example, in the prior art, multiplication between a vector and a matrix in order to transform vertex data is performed by iterating through the matrix, multiplying each component of the matrix by the vector, and adding the results. This prior art method requires additional logic and more complex microcode instructions, and thus takes longer to accomplish. Hence, another disadvantage to the prior art is the speed at which the graphics program is executed is significantly reduced. Because processing speed is limited, the complexity of scenes which can be rendered is also limited. In addition, the additional logic and coding increases the size and also the expense of the processors used in the prior art.
Accordingly, what is needed is a mechanism for implementing the graphics design process that reduces the expense of the associated hardware. What is further needed is a mechanism that accomplishes the above and also increases the speed at which the graphics program is executed. The present invention provides a novel solution to the above needs.
These and other objects and advantages of the present invention will become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.
The present invention provides a mechanism for implementing the graphics design process that reduces the expense of the associated hardware. The present invention also provides a mechanism that accomplishes the above and increases the speed at which the graphics program is executed.
The present invention is a processor for computer graphics calculations comprising an entire graphics engine in a single integrated circuit. In one embodiment, the processor is a RISC (reduced instruction set computer) processor.
In the present embodiment, the processor includes a transform mechanism that includes a transformation element (e.g., a dot product unit) adapted to compute transforms (e.g., dot products) used by the computer graphics calculations, a color unit for lighting calculations, and a perspective division element coupled to the transformation element.
In the present embodiment of the present invention, the transform mechanism of the processor also includes a scaling element for multiplication operations and a look-up table containing mathematical functions used by the computer graphics calculations.
The processor also includes a raster unit coupled to the transform mechanism, a texture unit coupled to the raster unit, and a shader unit coupled to the texture unit. Thus, the present invention comprises an entire graphics engine in a single processor.
In the present embodiment, the transform mechanism is adapted to perform a dot product operation by computing the dot product of the vector representing the coordinates of a vertex with a row of a coordinate transformation matrix. The present invention utilizes hardware specifically designed to compute the dot product, thereby increasing processing speed and simplifying control of the process.